Aristotle University of Thessaloniki (AUTH) | Greece
Mr. Angelos Athanasiadis is a Ph.D. candidate in Electrical and Computer Engineering at Aristotle University of Thessaloniki, specializing in FPGA-based acceleration of Convolutional Neural Networks (CNNs) and heterogeneous computing systems. He holds an M.Eng. in Electronics and Computer Systems and an MBA with high distinction. His research focuses on energy-efficient FPGA architectures, full-precision CNN inference on reconfigurable hardware, drone-assisted monitoring systems, distributed embedded system emulation, and timing-accurate simulation of cyber-physical systems. Angelos has contributed to EU-funded research projects such as ADVISER and REDESIGN, and has gained industrial experience in embedded system development and R&D at Cadence Design Systems, EXAPSYS, and SEEMS PC. He developed a parameterizable high-level synthesis matrix multiplication library for AMD FPGAs and designed FUSION, an open-source framework integrating QEMU with OMNeT++ via HLA/CERTI for deterministic, sub-microsecond synchronized, multi-node emulation of heterogeneous computing systems. His work supports realistic prototyping of systems combining CPUs, GPUs, and FPGAs in accuracy-critical domains such as aerial monitoring and autonomous embedded platforms. With a strong foundation in both academic research and industrial applications, Angelos advances the field of FPGA-based acceleration and distributed embedded computing, bridging innovation with practical deployment.
Featured Publications
Athanasiadis, A., Tampouratzis, N., & Papaefstathiou, I. (2025). An efficient open-source design and implementation framework for non-quantized CNNs on FPGAs. Integration, 102625.
Athanasiadis, A., Tampouratzis, N., & Papaefstathiou, I. (2025). Energy-efficient FPGA framework for non-quantized convolutional neural networks. arXiv preprint arXiv:2510.13362.
Athanasiadis, A., Tampouratzis, N., & Papaefstathiou, I. (2024). An open-source HLS fully parameterizable matrix multiplication library for AMD FPGAs. WiPiEC Journal – Works in Progress in Embedded Computing Journal, 10(2).
Katselas, L., Jiao, H., Athanasiadis, A., Papameletis, C., Hatzopoulos, A., … (2017). Embedded toggle generator to control the switching activity during test of digital 2D-SoCs and 3D-SICs. 2017 27th International Symposium on Power and Timing Modeling, Optimization and Simulation (PATMOS).
Katselas, L., Athanasiadis, A., Hatzopoulos, A., Jiao, H., Papameletis, C., … (2017). Embedded toggle generator to control the switching activity. 2017. (Conference details same as above; possible short version or extended abstract.)